Semiconductor Wet Cleaning Technology and Its Development

Wet cleaning is a critical process step in semiconductor manufacturing, involving the use of various chemical reagents and deionized water to remove contaminants from the wafer surface—such as particles, organic residues, metal ions, and natural oxide layers—through chemical reactions and physical dissolution. As integrated circuit technology continues to advance toward smaller feature sizes, the cleanliness of the wafer surface has become increasingly vital to device performance and reliability. Today, wet cleaning accounts for more than 30% of the overall manufacturing process, and it is often reused multiple times before and after steps like diffusion, thin-film deposition, and ion implantation. The precision of this wet-cleaning process directly influences the final yield of high-quality chips.

I. Main Methods and Development of Wet Cleaning

Currently, the wet cleaning techniques widely adopted in the industry mainly include the RCA cleaning method and its improved processes. The RCA standard cleaning method was introduced by Radio Corporation of America in the 1970s. At its core are two basic cleaning solutions: SC1 (ammonia-hydrogen peroxide-water mixture) and SC2 (hydrochloric acid-hydrogen peroxide-water mixture), which are specifically designed to remove particles, organic contaminants, and metallic impurities, respectively. As process requirements have become more demanding, additional steps such as SPM (sulfuric acid-hydrogen peroxide mixture, also known as piranha cleaning) and diluted hydrofluoric acid (DHF) have been incorporated—either as complementary processes or as pre-cleaning steps—to enhance the removal of organic residues and oxide layers.

In recent years, cleaning processes have been continuously optimized to meet the stringent requirements of advanced manufacturing processes for controlling particle and metal contamination. For instance, by fine-tuning the chemical solution ratios, adjusting temperature and processing time, and incorporating megasonic-assisted cleaning, it’s possible to effectively remove nanoparticles while minimizing damage to patterned wafers. Additionally, semi-aqueous cleaning methods and co-solvent techniques are increasingly being adopted in specific applications, helping to reduce chemical consumption and enhance overall cleaning efficiency.

II. Selection of Chemical Reagents and Process Control

The cleaning effectiveness highly depends on the purity of the chemical reagents. The Semiconductor Equipment and Materials International (SEMI) has established stringent grade standards for ultrapure, high-purity reagents, covering aspects such as metal impurity levels, particle count, and particle size control. In practical processes, it is essential to select appropriate reagents based on the type of contamination, while also rigorously controlling process parameters, such as:

• Temperature Control: Temperature affects the reaction rate and must be kept stable. For example, SC1 is typically controlled between 30–70°C to prevent excessive ammonia evaporation and minimize increases in silicon wafer surface roughness.
• Concentration Management: Maintain the concentration of volatile components such as hydrogen peroxide using an automatic replenishment system, ensuring consistent cleaning performance.
• Filtration and Circulation: Configuring a circulating filtration system with inert material filters such as PTFE can effectively remove particulate contaminants that accumulate in the plating bath solution.
• Fluid dynamics optimization: Employing methods such as in-channel circulation, spray irrigation, and bubbling to enhance solution uniformity, combined with megasonic waves to boost particle removal efficiency.

III. Advances in the Rinsing Process

Removing residual chemical liquids after cleaning is crucial, as incomplete rinsing can lead to secondary contamination. The Quick Drain Rinsing (QDR) tank is currently the mainstream rinsing equipment, utilizing mechanisms such as multi-channel spray irrigation, overflow drainage, nitrogen bubbling, and rapid emptying to achieve highly efficient purification of wafer surfaces. Key process parameters include uniformity of spray coverage, drainage time (typically 3–10 seconds), and real-time water quality monitoring (such as resistivity detection), ensuring the high purity of deionized water and the effectiveness of the rinsing process.

IV. Summary and Outlook

As semiconductor device dimensions continue to shrink, wet cleaning processes are evolving toward lower damage, higher selectivity, environmental friendliness, and smarter equipment. Currently, advanced wet cleaning systems have achieved high levels of automation and precise control in areas such as temperature management, liquid handling, and micro-contamination control. Looking ahead, to meet the growing demands for cleaning 3D structures and new materials—such as post-EUV lithography cleaning and through-silicon via (TSV) cleaning—wet technologies will need to make continuous breakthroughs in process integration and compatibility with emerging materials.

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