Principle and Parameter Control of the SC-1 Cleaning Process

1 Introduction

As integrated circuit feature sizes continue to shrink, controlling surface contamination on wafers has become a critical bottleneck for improving yield. Since its introduction in the 1970s, SC‑1—also known as APM, an aqueous ammonia–hydrogen peroxide solution—has remained the standard process for removing organic contaminants and sub‑micron particles. However, its inherent isotropic micro‑etching characteristics have, at advanced nodes, evolved from an “acceptable side reaction” into a “major source of risk.” Consequently, gaining a deep understanding of SC‑1’s multi‑parameter coupling mechanisms and tracing the trajectory of its process evolution holds practical significance for the development of advanced manufacturing processes.

2 Chemical Basis and Synergistic Mechanism of SC-1 Cleaning

The core reactions in the SC-1 system include:

• H₂O₂ oxidizes the silicon surface, forming a chemical oxide layer (SiOₓ).
• The OH⁻ ions supplied by NH₄OH chemically etch the oxide layer, while the negative charge–repulsion effect simultaneously removes particles from the surface.
• The dynamic competition between oxidation and etching determines the net silicon loss and the surface microtopography.

This process is not a simple superposition; rather, it relies on the instantaneous matching of the oxidation rate and the etching rate. When the two are balanced, the oxide layer beneath the particle is removed uniformly, while a new oxide layer passivates the exposed silicon surface, thereby achieving a “lift-off” effect. If this balance is disrupted, either over‑etching (leading to increased roughness) or oxide residue (resulting in particle re‑adhesion) will occur.

3 Quantitative Analysis of the Influence of Key Process Parameters

3.1 Temperature—The Core Variable Governing Reaction Kinetics

The effect of temperature on SC‑1 efficiency exhibits an exponential trend. Experimental results indicate that 65°C is the typical process condition at which the decomposition rate of H₂O₂ and the silicon etching rate achieve optimal matching. At this temperature, the dynamic exchange between oxide layer formation and removal reaches its maximum frequency, and the particle removal efficiency (PRE) can exceed 95%.

Quantitatively, for every 10°C increase in temperature, the overall reaction rate approximately doubles (consistent with Arrhenius behavior). However, excessively high temperatures (>75°C) accelerate the homogeneous decomposition of H₂O₂, generating a large number of O₂ bubbles that not only reduce the effective oxidant concentration but may also cause micro‑turbulent damage to the wafer surface. Conversely, temperatures that are too low (<55°C) result in insufficient etching kinetics and incomplete particle removal. Therefore, in practical production lines, the process bath must be equipped with a precise temperature‑control system (±0.5°C), and the residual H₂O₂ concentration should be monitored for each batch to account for decomposition losses, with regular replenishment or replacement of the bath solution as needed.

3.2 Concentration Ratios—The Chemical Lever of Etching/Oxidation Balance

The volume ratio (or molar ratio) of NH₄OH to H₂O₂ directly determines the reaction’s thermodynamic favorability. When the NH₄OH:H₂O₂ ratio exceeds 1, the system becomes excessively alkaline, causing the etching rate to dominate over the oxidation rate and leading to pronounced isotropic corrosion of the silicon surface. Under these conditions, the root-mean-square roughness (RMS) measured by atomic force microscopy (AFM) can rise above 0.5 nm, which is unacceptable for advanced process nodes.

Conversely, if the ratio is too low, the oxide layer becomes excessively thick and dissolves slowly, making it difficult to effectively lift off particles and reducing cleaning efficiency. The optimal formulation typically requires dynamic adjustment based on the specific equipment, the wafer’s film‑stack structure, and the process history; a recommended range of 1:1 to 1:5 (NH₄OH:H₂O₂) is often explored, with a growing preference for lower ammonia concentrations to mitigate roughness growth.

3.3 Cleaning Time—The Trade-off Between Removal Efficiency and Line Width Loss

The typical process window is 5–15 minutes. If the duration is too short (<5 min), the van der Waals forces between the particles and the wafer surface are not sufficiently weakened, leading to an increased residue rate; if it is too long (>15 min), continuous micro‑etching accumulates, causing a linear increase in critical dimension (CD) loss, which is particularly detrimental for devices with narrow feature sizes (<30 nm).

In production practice, time is often used as a control margin: with temperature and formulation ratios held constant, the optimal endpoint is determined through short-term trial washes, and endpoint‑detection technologies—such as reflectance monitoring—are employed to enable dynamic cutoff.

4 Process Evolution: From Conventional Trench Technology to Advanced Node Solutions

4.1 The Scalability Bottleneck of Traditional SC-1

The conventional槽式 SC‑1 requires the one-time preparation of large volumes of chemical solutions—ranging from tens to hundreds of liters—which not only consumes expensive chemicals but also incurs substantial costs for treating the resulting waste effluent, which contains high concentrations of ammoniacal nitrogen and peroxides. With the widespread adoption of 300‑mm wafer mass production, the marginal benefits of this approach have declined sharply.

4.2 Single-Plate Rotary Spray SC-1—A Breakthrough Achieving an 80% Reduction in Material Usage

Advanced nodes (such as 28 nm and below) have widely adopted the single-wafer spin-spray process. By atomizing a diluted SC‑1 solution and spraying it onto the surface of a rapidly rotating wafer, centrifugal force enhances mass transfer, enabling cleaning performance comparable to that of tank‑type systems at extremely low flow rates. Data show that chemical consumption is reduced by approximately 80%, while effluent discharge is significantly lowered. Moreover, temperature and process parameters can be independently adjusted for each individual wafer, thereby eliminating the risk of cross‑contamination associated with tank‑type systems.

4.3 Dilute SC-1 (DHF-last process) — inhibits metal redeposition

After HF pretreatment—designed to remove the native oxide layer and metallic contaminants—a very dilute SC‑1 solution (with an ammonia concentration reduced to 1/10 to 1/5 of the conventional formulation) is used for a brief rinse, a strategy known as “DHF‑last.” While maintaining excellent particle‑removal performance, this approach leverages the diminished pH‑buffering capacity of the low‑pH solution to significantly reduce the tendency for metal ions (such as Fe and Cu) to redeposit on the silicon surface, thereby mitigating the drawback of increased surface active sites following HF treatment.

4.4 Ozone‑water (O₃‑DIW) + Dilute NH₄OH Mixed System — An Alternative Approach

To mitigate the risks associated with the transportation, storage, and decomposition of H₂O₂, some production lines are exploring an alternative approach that combines ozone‑deionized water (O₃‑DIW) with dilute NH₄OH. In‑situ generation of ozone provides strong oxidizing power while avoiding the introduction of additional metallic impurities that can accompany hydrogen peroxide (H₂O₂ itself may contain trace metals). Although this system demonstrates good performance in removing organic contaminants, its efficiency in lifting sub‑micron particles still requires further validation; for now, it is being used primarily as a supplement to SC‑1 rather than as a full replacement.

5. The Refinement Challenges of Advanced Nodes (≤14 nm)

For 14 nm and smaller process nodes, the requirements for silicon surface roughness are extremely stringent, with RMS typically needing to be kept below 0.1 nm. This means that the conventional parameter window of SC‑1 no longer applies—any temperature fluctuations exceeding ±2°C or deviations in the etchant ratio can cause the roughness to exceed the specification, thereby compromising the integrity of the subsequent gate oxide layer and degrading carrier mobility.

Current engineering practice tends to:

• Multi-step short-cycle rinsing: The single 15‑minute cleaning process is divided into multiple short cycles, interspersed with pure water rinses, thereby controlling the cumulative etch depth in an intermittent manner.
• Real-time pH monitoring and automated liquid replenishment: An online sensor dynamically adjusts the NH₄OH injection rate to compensate for pH drift caused by H₂O₂ decomposition.
• Additive incorporation: A small amount of surfactant or complexing agent can selectively passivate the silicon surface, reducing the likelihood of OH⁻ attack; however, residual risks must be carefully assessed.

It can be said that the SC‑1 has evolved from a “coarse, batch‑based process” to a “nanoscale, precision‑engineered process,” with the degree of narrowing in its parameter window directly reflecting the sophistication of its process‑control capabilities.

6 Conclusion

The effectiveness of SC‑1 cleaning hinges on the precise three‑dimensional coupling of temperature, concentration ratio, and processing time. The optimal balance near 65°C, along with the rule that performance doubles for every 10°C increase in temperature, provides a solid foundation for process tuning. As technology nodes advance, conventional single‑wafer spray‑type cleaning, dilute formulations, and ozone‑replacement strategies are being adopted to simultaneously achieve reduced material consumption, lower contamination, and fine‑tuned feature control. Under the stringent RMS limit of 0.1 nm, the SC‑1 formulation has ceased to be a fixed recipe; instead, it has evolved into an adaptive system that must be dynamically optimized for each specific product. Looking ahead, integrating AI‑assisted optimization with real‑time metrology feedback holds promise for further extending the viability of this established process.

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